Method and apparatus for attaching multiple slave devices to a single bus controller interface while supporting command pipelining
    1.
    发明授权
    Method and apparatus for attaching multiple slave devices to a single bus controller interface while supporting command pipelining 有权
    用于在支持命令流水线时将多个从设备连接到单个总线控制器接口的方法和装置

    公开(公告)号:US07865644B2

    公开(公告)日:2011-01-04

    申请号:US11927911

    申请日:2007-10-30

    IPC分类号: G06F13/00

    CPC分类号: G06F13/385

    摘要: In a method and apparatus associated with a bus controller, a set of mechanisms are selectively added to the bus controller, as well as to slave devices connected to the bus controller. A mechanism is also added to one or more master devices connected to the bus controller, in order to provide the master devices with a transaction ordering capability. The added mechanisms collectively achieve the objective of supporting connection of multiple slave devices to a common controller interface, and at the same time allowing pipelined operation of the slave devices. One embodiment of the invention is directed to a method for use with a bus and an associated bus controller, wherein the bus controller has respective master and slave interfaces for use in selectively interconnecting master devices and slave devices. The method comprises the steps of connecting one or more of the master devices to one of the master interfaces, and connecting each of a plurality of slave devices to the same one of the slave interfaces. The method further comprises operating a connected master device to send multiple commands to a selected one of the connected slave devices in accordance with a command pipelining procedure.

    摘要翻译: 在与总线控制器相关联的方法和装置中,一组机制被选择性地添加到总线控制器以及连接到总线控制器的从设备。 为了向主设备提供事务排序能力,还将一种机制添加到连接到总线控制器的一个或多个主设备中。 所附加的机制共同实现支持多个从设备连接到公共控制器接口的目的,并且同时允许从设备的流水线操作。 本发明的一个实施例涉及一种与总线和相关联的总线控制器一起使用的方法,其中总线控制器具有用于选择性地互连主设备和从设备的主和从接口。 该方法包括以下步骤:将一个或多个主设备连接到一个主接口,并将多个从设备中的每一个连接到同一个从接口。 该方法还包括操作连接的主设备,以根据命令流水线过程向连接的从设备中的所选一个发送多个命令。

    Method and Apparatus for Attaching Multiple Slave Devices to a Single Bus Controller Interface While Supporting Command Pipelining
    2.
    发明申请
    Method and Apparatus for Attaching Multiple Slave Devices to a Single Bus Controller Interface While Supporting Command Pipelining 有权
    用于在支持命令流水线时将多个从设备连接到单总线控制器接口的方法和装置

    公开(公告)号:US20090113097A1

    公开(公告)日:2009-04-30

    申请号:US11927911

    申请日:2007-10-30

    IPC分类号: G06F13/00

    CPC分类号: G06F13/385

    摘要: In a method and apparatus associated with a bus controller, a set of mechanisms are selectively added to the bus controller, as well as to slave devices connected to the bus controller. A mechanism is also added to one or more master devices connected to the bus controller, in order to provide the master devices with a transaction ordering capability. The added mechanisms collectively achieve the objective of supporting connection of multiple slave devices to a common controller interface, and at the same time allowing pipelined operation of the slave devices. One embodiment of the invention is directed to a method for use with a bus and an associated bus controller, wherein the bus controller has respective master and slave interfaces for use in selectively interconnecting master devices and slave devices. The method comprises the steps of connecting one or more of the master devices to one of the master interfaces, and connecting each of a plurality of slave devices to the same one of the slave interfaces. The method further comprises operating a connected master device to send multiple commands to a selected one of the connected slave devices in accordance with a command pipelining procedure.

    摘要翻译: 在与总线控制器相关联的方法和装置中,一组机制被选择性地添加到总线控制器以及连接到总线控制器的从设备。 为了向主设备提供事务排序能力,还将一种机制添加到连接到总线控制器的一个或多个主设备中。 所附加的机制共同实现支持多个从设备连接到公共控制器接口的目的,并且同时允许从设备的流水线操作。 本发明的一个实施例涉及一种与总线和相关联的总线控制器一起使用的方法,其中总线控制器具有用于选择性地互连主设备和从设备的主和从接口。 该方法包括以下步骤:将一个或多个主设备连接到一个主接口,并将多个从设备中的每一个连接到同一个从接口。 该方法还包括操作连接的主设备,以根据命令流水线过程向连接的从设备中的所选一个发送多个命令。

    Directory for multi-node coherent bus
    3.
    发明授权
    Directory for multi-node coherent bus 有权
    多节点相干总线目录

    公开(公告)号:US07725660B2

    公开(公告)日:2010-05-25

    申请号:US11828448

    申请日:2007-07-26

    IPC分类号: G06F12/00

    CPC分类号: G06F12/0822

    摘要: A method for maintaining cache coherency for a multi-node system using a specialized bridge which allows for fewer forward progress dependencies. A local node makes a determination whether a request is a local or system request. If the request is a local request, a look-up of a directory in the local node is performed. If an entry in the directory of the local node indicates that data in the request does not have a remote owner and that the request does not have a remote destination, the coherency of the data is resolved on the local node, and a transfer of the data specified in the request is performed if required and if the request is a local request. If the entry indicates that the data has a remote owner or that the request has a remote destination, the request is forwarded to all remote nodes in the multi-node system.

    摘要翻译: 一种使用允许较少前进进度依赖性的专用桥来维护多节点系统的高速缓存一致性的方法。 本地节点确定请求是本地还是系统请求。 如果请求是本地请求,则执行本地节点中的目录的查找。 如果本地节点目录中的条目指示请求中的数据不具有远程所有者,并且请求没有远程目标,则在本地节点上解析数据的一致性,并且传输 如果需要,请求中指定的数据将被执行,并且请求是本地请求。 如果条目指示数据具有远程所有者或请求具有远程目标,则将请求转发到多节点系统中的所有远程节点。

    Directory for multi-node coherent bus
    4.
    发明授权
    Directory for multi-node coherent bus 有权
    多节点相干总线目录

    公开(公告)号:US07669013B2

    公开(公告)日:2010-02-23

    申请号:US11828439

    申请日:2007-07-26

    IPC分类号: G06F12/00

    CPC分类号: G06F12/0817 G06F12/0831

    摘要: A method for maintaining cache coherency for a multi-node system using a specialized bridge which allows for fewer forward progress dependencies. A look-up of a local node directory is performed if a request received at a multi-node bridge of the local node is a system request. If a directory entry indicates that data specified in the request has a local owner or local destination, the request is forwarded to the local node. If the local node determines that the request is a local request, a look-up of the local node directory is performed. If the directory entry indicates that data specified in the request has a local owner and local destination, the coherency of the data on the local node is resolved and a transfer of the request data is performed if required. Otherwise, the request is forwarded to all remote nodes in the multi-node system.

    摘要翻译: 一种使用允许较少前进进度依赖性的专用桥来维护多节点系统的高速缓存一致性的方法。 如果在本地节点的多节点桥接处接收到的请求是系统请求,则执行本地节点目录的查找。 如果目录项指示请求中指定的数据具有本地所有者或本地目标,则请求将转发到本地节点。 如果本地节点确定请求是本地请求,则执行本地节点目录的查找。 如果目录条目指示请求中指定的数据具有本地所有者和本地目标,则解析本地节点上的数据的一致性,并且如果需要,则执行请求数据的传输。 否则,请求将转发到多节点系统中的所有远程节点。

    Directory For Multi-Node Coherent Bus
    5.
    发明申请
    Directory For Multi-Node Coherent Bus 有权
    多节点相干总线目录

    公开(公告)号:US20090031086A1

    公开(公告)日:2009-01-29

    申请号:US11828448

    申请日:2007-07-26

    IPC分类号: G06F12/16

    CPC分类号: G06F12/0822

    摘要: A method for maintaining cache coherency for a multi-node system using a specialized bridge which allows for fewer forward progress dependencies. A local node makes a determination whether a request is a local or system request. If the request is a local request, a look-up of a directory in the local node is performed. If an entry in the directory of the local node indicates that data in the request does not have a remote owner and that the request does not have a remote destination, the coherency of the data is resolved on the local node, and a transfer of the data specified in the request is performed if required and if the request is a local request. If the entry indicates that the data has a remote owner or that the request has a remote destination, the request is forwarded to all remote nodes in the multi-node system.

    摘要翻译: 一种使用允许较少前进进度依赖性的专用桥来维护多节点系统的高速缓存一致性的方法。 本地节点确定请求是本地还是系统请求。 如果请求是本地请求,则执行本地节点中的目录的查找。 如果本地节点目录中的条目指示请求中的数据不具有远程所有者,并且请求没有远程目标,则在本地节点上解析数据的一致性,并且传输 如果需要,请求中指定的数据将被执行,并且请求是本地请求。 如果条目指示数据具有远程所有者或请求具有远程目标,则将请求转发到多节点系统中的所有远程节点。

    Directory for Multi-Node Coherent Bus
    6.
    发明申请
    Directory for Multi-Node Coherent Bus 有权
    多节点相干总线目录

    公开(公告)号:US20090031085A1

    公开(公告)日:2009-01-29

    申请号:US11828439

    申请日:2007-07-26

    IPC分类号: G06F12/16

    CPC分类号: G06F12/0817 G06F12/0831

    摘要: A method for maintaining cache coherency for a multi-node system using a specialized bridge which allows for fewer forward progress dependencies. A look-up of a local node directory is performed if a request received at a multi-node bridge of the local node is a system request. If a directory entry indicates that data specified in the request has a local owner or local destination, the request is forwarded to the local node. If the local node determines that the request is a local request, a look-up of the local node directory is performed. If the directory entry indicates that data specified in the request has a local owner and local destination, the coherency of the data on the local node is resolved and a transfer of the request data is performed if required. Otherwise, the request is forwarded to all remote nodes in the multi-node system.

    摘要翻译: 一种使用允许较少前进进度依赖性的专用桥来维护多节点系统的高速缓存一致性的方法。 如果在本地节点的多节点桥接处接收到的请求是系统请求,则执行本地节点目录的查找。 如果目录项指示请求中指定的数据具有本地所有者或本地目标,则请求将转发到本地节点。 如果本地节点确定请求是本地请求,则执行本地节点目录的查找。 如果目录条目指示请求中指定的数据具有本地所有者和本地目标,则解析本地节点上的数据的一致性,并且如果需要,则执行请求数据的传输。 否则,请求将转发到多节点系统中的所有远程节点。

    System and method for providing improved bus utilization via target directed completion
    7.
    发明授权
    System and method for providing improved bus utilization via target directed completion 失效
    通过目标定向完成提供改进的总线利用率的系统和方法

    公开(公告)号:US06973520B2

    公开(公告)日:2005-12-06

    申请号:US10195172

    申请日:2002-07-11

    CPC分类号: G06F13/364

    摘要: An electronic system is disclosed, including multiple initiators and one or more targets coupled to a bus, and a request mask control unit (RMCU). The initiators are configured to initiate requests (e.g., read requests and write requests) via the bus, and the targets are configured to receive requests from the initiators via the bus. The targets are also configured to produce multiple MaskEnable signals, wherein each of the MaskEnable signals is generated following an initial request received via the bus, and dependent on a corresponding “masking situation” within the target. The RMCU receives the MaskEnable signals and produces multiple RequestMask signals dependent upon the MaskEnable signals. One or more of the initiators are permitted to repeat requests via the bus dependent upon one or more of the RequestMask signals. This mechanism provides additional bus bandwidth for carrying out successful data transfers.

    摘要翻译: 公开了一种电子系统,包括多个启动器和耦合到总线的一个或多个目标,以及请求掩码控制单元(RMCU)。 启动器被配置为经由总线发起请求(例如,读请求和写请求),并且目标被配置为经由总线接收来自发起者的请求。 目标还被配置为产生多个MaskEnable信号,其中每个MaskEnable信号是在经由总线接收到的初始请求之后生成的,并且取决于目标内相应的“屏蔽情况”。 RMCU接收MaskEnable信号,并根据MaskEnable信号产生多个RequestMask信号。 一个或多个启动器被允许经由总线重复请求,取决于一个或多个请求掩码信号。 该机制为进行成功的数据传输提供了额外的总线带宽。

    Method and bus prefetching mechanism for implementing enhanced buffer control
    8.
    发明授权
    Method and bus prefetching mechanism for implementing enhanced buffer control 失效
    用于实现增强缓冲区控制的方法和总线预取机制

    公开(公告)号:US07490201B2

    公开(公告)日:2009-02-10

    申请号:US11944644

    申请日:2007-11-26

    IPC分类号: G06F13/28 G06F12/00

    CPC分类号: G06F13/28

    摘要: A method, and bus prefetching mechanism are provided for implementing enhanced buffer control. A computer system includes a plurality of masters and at least one slave exchanging data over a system bus and the slave prefetches read data under control of a master. The master generates a continue bus signal that indicates a new or a continued request. The master generates a prefetch bus signal that indicates an amount to prefetch including no prefetching. The master includes a mechanism for continuing a sequence of reads allowing prefetching until a request is made indicating a prefetch amount of zero.

    摘要翻译: 提供了一种方法和总线预取机制,用于实现增强的缓冲区控制。 计算机系统包括多个主器件和至少一个从器件通过系统总线交换数据,并且从器件在主器件的控制下预读取数据。 主机产生指示新的或持续请求的继续总线信号。 主机产生一个预取总线信号,指示预取量,包括不预取。 主机包括用于继续读取序列的机制,允许预取,直到作出指示预取量为零的请求。

    Method and bus prefetching mechanism for implementing enhanced buffer control
    9.
    发明授权
    Method and bus prefetching mechanism for implementing enhanced buffer control 失效
    用于实现增强缓冲区控制的方法和总线预取机制

    公开(公告)号:US07328312B2

    公开(公告)日:2008-02-05

    申请号:US11050295

    申请日:2005-02-03

    IPC分类号: G06F13/28 G06F12/00

    CPC分类号: G06F13/28

    摘要: A method, and bus prefetching mechanism are provided for implementing enhanced buffer control. A computer system includes a plurality of masters and at least one slave exchanging data over a system bus and the slave prefetches read data under control of a master. The master generates a continue bus signal that indicates a new or a continued request. The master generates a prefetch bus signal that indicates an amount to prefetch including no prefetching. The master includes a mechanism for continuing a sequence of reads allowing prefetching until a request is made indicating a prefetch amount of zero.

    摘要翻译: 提供了一种方法和总线预取机制,用于实现增强的缓冲区控制。 计算机系统包括多个主器件和至少一个从器件通过系统总线交换数据,并且从器件在主器件的控制下预读取数据。 主机产生指示新的或持续请求的继续总线信号。 主机产生一个预取总线信号,指示预取量,包括不预取。 主机包括用于继续读取序列的机制,允许预取,直到作出指示预取量为零的请求。

    Method and apparatus for passing messages through a bus-to-bus bridge while maintaining ordering
    10.
    发明授权
    Method and apparatus for passing messages through a bus-to-bus bridge while maintaining ordering 失效
    用于在保持排序的同时通过总线到总线桥接信息的方法和装置

    公开(公告)号:US06801977B2

    公开(公告)日:2004-10-05

    申请号:US10042096

    申请日:2002-01-07

    IPC分类号: G07F1336

    CPC分类号: G06F13/4059

    摘要: An apparatus and method for passing messages through a bus-to-bus bridge while maintaining ordering. The method comprises passing messages into a message container in the bus bridge without using the bridge buffer, setting a flag that tracks all the writes in the write queue ahead of when the message was put into the message container, blocking the receiving device on the bus connected to the bridge from accessing the message container until the flag is cleared, and clearing the flag when all the writes put into the write queue ahead of when the flag was set have been written to local memory on the receiving bus, then allowing the device on the receiving bus that is the intended recipient to receive the message.

    摘要翻译: 一种用于在保持排序的同时通过总线到总线桥接信息的装置和方法。 该方法包括将消息传递到总线桥中的消息容器中,而不使用桥接缓冲器,设置在消息被放入消息容器之前跟踪写入队列中的所有写入的标志,阻止总线上的接收设备 连接到桥接器访问消息容器直到标志被清除,并且当在设置标志之后写入队列的所有写入已经被写入到接收总线上的本地存储器中时清除标志,然后允许该设备 在接收消息的接收总线上。