发明授权
US07865885B2 Using transactional memory for precise exception handling in aggressive dynamic binary optimizations
有权
在积极的动态二进制优化中使用事务内存进行精确的异常处理
- 专利标题： Using transactional memory for precise exception handling in aggressive dynamic binary optimizations
- 专利标题（中）： 在积极的动态二进制优化中使用事务内存进行精确的异常处理
-
申请号： US11528801申请日： 2006-09-27
-
公开(公告)号： US07865885B2公开(公告)日： 2011-01-04
- 发明人: Youfeng Wu , Cheng Wang , Ho-seop Kim
- 申请人： Youfeng Wu , Cheng Wang , Ho-seop Kim
- 申请人地址： US CA Santa Clara
- 专利权人： Intel Corporation
- 当前专利权人： Intel Corporation
- 当前专利权人地址： US CA Santa Clara
- 代理机构： Blakely, Sokoloff, Taylor & Zafman LLP
- 主分类号： G06F9/45
- IPC分类号： G06F9/45
摘要：
Dynamic optimization of application code is performed by selecting a portion of the application code as a possible transaction. A transaction has a property that when it is executed, it is either atomically committed or atomically aborted. Determining whether to convert the selected portion of the application code to a transaction includes determining whether to apply at least one of a group of code optimizations to the portion of the application code. If it is determined to apply at least one of the code optimizations of the group of optimizations to the portion of application code, then the optimization is applied to the portion of the code and the portion of the code is converted to a transaction.
公开/授权文献
信息查询
