发明授权
- 专利标题： Digital signal processing element having an arithmetic logic unit
- 专利标题（中）： 具有算术逻辑单元的数字信号处理单元
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申请号： US11408364申请日： 2006-04-21
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公开(公告)号： US07882165B2公开(公告)日： 2011-02-01
- 发明人: James M. Simkins , Jennifer Wong , Bernard J. New , Alvin Y. Ching , John M. Thendean , Anna Wing Wah Wong , Vasisht Mantra Vadi , David P. Schultz
- 申请人： James M. Simkins , Jennifer Wong , Bernard J. New , Alvin Y. Ching , John M. Thendean , Anna Wing Wah Wong , Vasisht Mantra Vadi , David P. Schultz
- 申请人地址： US CA San Jose
- 专利权人： Xilinx, Inc.
- 当前专利权人： Xilinx, Inc.
- 当前专利权人地址： US CA San Jose
- 代理商 John J. King
- 主分类号： G06F7/38
- IPC分类号： G06F7/38
摘要：
A digital signal processing circuit including: a multiplier circuit; a plurality of multiplexers coupled to the multiplier circuit and controlled by a first opcode; and an arithmetic logic unit coupled to plurality of multiplexers and controlled by a second opcode.