Invention Grant
- Patent Title: Method for assembling stackable semiconductor packages
- Patent Title (中): 堆叠式半导体封装的组装方法
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Application No.: US12499788Application Date: 2009-07-08
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Publication No.: US07888186B2Publication Date: 2011-02-15
- Inventor: Zhigang Bai , Weimin Chen , Zhijie Wang
- Applicant: Zhigang Bai , Weimin Chen , Zhijie Wang
- Applicant Address: US TX Austin
- Assignee: Freescale Semiconductor, Inc.
- Current Assignee: Freescale Semiconductor, Inc.
- Current Assignee Address: US TX Austin
- Agent Charles Bergere
- Priority: CN200910149320 20090616
- Main IPC: H01L21/00
- IPC: H01L21/00

Abstract:
A method for assembling a stackable semiconductor package includes providing a substrate having a first surface and a second surface. The first surface includes bond pads and one or more die pads. Conductive bumps are formed on the bond pads and one or more semiconductor dies are attached to the one or more die pads. The first surface of the substrate, the semiconductor dies and the conductive bumps are placed in a side-gate molding cast and a mold material is supplied to the first surface of the substrate to form a stackable semiconductor package. Similarly formed semiconductor packages may be stacked, one on another to form a stacked semiconductor package.
Public/Granted literature
- US20100317152A1 METHOD FOR ASSEMBLING STACKABLE SEMICONDUCTOR PACKAGES Public/Granted day:2010-12-16
Information query
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