发明授权
- 专利标题: Methods of forming charge-trap type non-volatile memory devices
- 专利标题(中): 形成电荷陷阱型非易失性存储器件的方法
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申请号: US12766272申请日: 2010-04-23
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公开(公告)号: US07888219B2公开(公告)日: 2011-02-15
- 发明人: Jae-Sung Sim , Jung-Dal Choi , Chang-Seok Kang
- 申请人: Jae-Sung Sim , Jung-Dal Choi , Chang-Seok Kang
- 申请人地址: KR Gyeonggi-do
- 专利权人: Samsung Electronics Co., Ltd.
- 当前专利权人: Samsung Electronics Co., Ltd.
- 当前专利权人地址: KR Gyeonggi-do
- 代理机构: Myers Bigel Sibley & Sajovec, P.A.
- 优先权: KR2006-37805 20060426
- 主分类号: H01L21/336
- IPC分类号: H01L21/336
摘要:
Methods of forming a non-volatile memory device may include forming a tunnel insulating layer on a semiconductor substrate and forming a charge-trap layer on the tunnel insulating layer. A trench may then be formed extending through the tunnel insulating layer and the charge-trap layer and into the semiconductor substrate so that portions of the charge-trap layer and the tunnel insulating layers remain on opposite sides of the trench. A device isolation layer may be formed in the trench, and a blocking insulating layer may be formed on the device isolation layer and on remaining portions of the charge-trap layer. A gate electrode may be formed on the blocking insulating layer, and the blocking insulating layer and remaining portions of the charge-trap layer may be patterned to provide a blocking insulating pattern and a charge-trap pattern between the gate electrode and the semiconductor substrate.