发明授权
US07890917B1 Method and apparatus for providing secure intellectual property cores for a programmable logic device
有权
为可编程逻辑器件提供安全的知识产权核心的方法和装置
- 专利标题： Method and apparatus for providing secure intellectual property cores for a programmable logic device
- 专利标题（中）： 为可编程逻辑器件提供安全的知识产权核心的方法和装置
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申请号： US12008848申请日： 2008-01-14
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公开(公告)号： US07890917B1公开(公告)日： 2011-02-15
- 发明人: Jay T. Young , Jeffrey M. Mason
- 申请人： Jay T. Young , Jeffrey M. Mason
- 申请人地址： US CA San Jose
- 专利权人： Xilinx, Inc.
- 当前专利权人： Xilinx, Inc.
- 当前专利权人地址： US CA San Jose
- 代理商 Robert M. Brush
- 主分类号： G06F17/50
- IPC分类号： G06F17/50
摘要：
Method and apparatus for providing secure intellectual property (IP) cores for a programmable logic device (PLD) are described. An aspect of the invention relates to a method of securely distributing an IP core for PLDs. A circuit design is generated for the IP core, the circuit design being re-locatable in a programmable fabric for PLDs. The circuit design is encoded to produce at least one partial configuration bitstream. Implementation data is generated for utilizing the IP core as a reconfigurable module in top-level circuit designs. The at least one partial configuration bitstream and the implementation data are delivered to users of the PLDs.
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