Invention Grant
US07894241B2 Memory cell array and semiconductor memory device including the same
失效
存储单元阵列和包括其的半导体存储器件
- Patent Title: Memory cell array and semiconductor memory device including the same
- Patent Title (中): 存储单元阵列和包括其的半导体存储器件
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Application No.: US12326940Application Date: 2008-12-03
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Publication No.: US07894241B2Publication Date: 2011-02-22
- Inventor: Yun-Sang Lee , Woo-Jung Sun , Jung-Bae Lee
- Applicant: Yun-Sang Lee , Woo-Jung Sun , Jung-Bae Lee
- Applicant Address: KR Suwon-si, Gyeonggi-do
- Assignee: Samsung Electronics Co., Ltd.
- Current Assignee: Samsung Electronics Co., Ltd.
- Current Assignee Address: KR Suwon-si, Gyeonggi-do
- Agency: Volentine & Whitt, PLLC
- Priority: KR10-2007-0127502 20071210
- Main IPC: G11C7/00
- IPC: G11C7/00

Abstract:
A memory cell array with open bit line structure includes a first sub memory cell array, a second sub memory cell array, a sense-amplifier/precharge circuit, first capacitors and second capacitors. The first sub memory cell array is activated in response to a first word line enable signal, and the second sub memory cell array is activated in response to a second word line enable signal. The sense-amplifier/precharge circuit is connected to the first sub memory cell array through first bit lines and to the second sub memory cell array through second bit lines, and the sense-amplifier/precharge circuit precharges the first bit lines and the second bit lines and amplifies data provided from the first sub memory cell array and the second sub memory cell array.
Public/Granted literature
- US20090147559A1 MEMORY CELL ARRAY AND SEMICONDUCTOR MEMORY DEVICE INCLUDING THE SAME Public/Granted day:2009-06-11
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