Invention Grant
US07894927B2 Using Multi-Layer/Multi-Input/Multi-Output (MLMIMO) models for metal-gate structures
有权
使用金属栅结构的多层/多输入/多输出(MLMIMO)模型
- Patent Title: Using Multi-Layer/Multi-Input/Multi-Output (MLMIMO) models for metal-gate structures
- Patent Title (中): 使用金属栅结构的多层/多输入/多输出(MLMIMO)模型
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Application No.: US12186619Application Date: 2008-08-06
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Publication No.: US07894927B2Publication Date: 2011-02-22
- Inventor: Merritt Funk , Radha Sundararajan , Asao Yamashita , Daniel Prager , Hyung Joo Lee
- Applicant: Merritt Funk , Radha Sundararajan , Asao Yamashita , Daniel Prager , Hyung Joo Lee
- Applicant Address: JP Tokyo
- Assignee: Tokyo Electron Limited
- Current Assignee: Tokyo Electron Limited
- Current Assignee Address: JP Tokyo
- Main IPC: G06F19/00
- IPC: G06F19/00 ; G06F17/50 ; G06F7/60 ; G06F1/00

Abstract:
The invention provides a method of processing a wafer using multilayer processing sequences and Multi-Layer/Multi-Input/Multi-Output (MLMIMO) models and libraries that can include one or more measurement procedures, one or more Poly-Etch (P-E) sequences, and one or more metal-gate etch sequences. The MLMIMO process control uses dynamically interacting behavioral modeling between multiple layers and/or multiple process steps. The multiple layers and/or the multiple process steps can be associated with the creation of lines, trenches, vias, spacers, contacts, and gate structures that can be created using isotropic and/or anisotropic etch processes.
Public/Granted literature
- US20100036518A1 Using Multi-Layer/Multi-Input/Multi-Output (MLMIMO) Models for Metal-Gate Structures Public/Granted day:2010-02-11
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