发明授权
US07895412B1 Programmable arrayed processing engine architecture for a network switch
有权
用于网络交换机的可编程阵列处理引擎架构
- 专利标题： Programmable arrayed processing engine architecture for a network switch
- 专利标题（中）： 用于网络交换机的可编程阵列处理引擎架构
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申请号： US10184564申请日： 2002-06-27
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公开(公告)号： US07895412B1公开(公告)日： 2011-02-22
- 发明人: Darren Kerr , Kenneth Michael Key , Michael L. Wright , William E. Jennings
- 申请人： Darren Kerr , Kenneth Michael Key , Michael L. Wright , William E. Jennings
- 申请人地址： US CA San Jose
- 专利权人： Cisco Tehnology, Inc.
- 当前专利权人： Cisco Tehnology, Inc.
- 当前专利权人地址： US CA San Jose
- 代理机构： Cesari and McKenna, LLP
- 主分类号： G06F15/80
- IPC分类号： G06F15/80
摘要：
A programmable processing engine processes transient data within an intermediate network station of a computer network. The engine comprises an array of processing elements symmetrically arrayed as rows and columns, and embedded between input and output buffer units with a plurality of interfaces from the array to an external memory. The external memory stores non-transient data organized within data structures, such as forwarding and routing tables, for use in processing the transient data. Each processing element contains an instruction memory that allows programming of the array to process the transient data as processing element stages of baseline or extended pipelines operating in parallel.
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