Invention Grant
- Patent Title: High throughput die-to-wafer bonding using pre-alignment
- Patent Title (中): 使用预对准的高通量晶片到晶片键合
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Application No.: US12329304Application Date: 2008-12-05
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Publication No.: US07897481B2Publication Date: 2011-03-01
- Inventor: Wen-Chih Chiou , Weng-Jin Wu , Chen-Hua Yu
- Applicant: Wen-Chih Chiou , Weng-Jin Wu , Chen-Hua Yu
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Slater & Matsil, L.L.P.
- Main IPC: H01L21/98
- IPC: H01L21/98

Abstract:
A method of forming integrated circuits includes providing a wafer that includes a plurality of dies; aligning a first top die to a first bottom die in the wafer; recording a first destination position of the first top die after the first top die is aligned to the first bottom die; bonding the first top die onto the first bottom die; calculating a second destination position of a second top die using the first destination position; moving the second top die to the second destination position; and bonding the second top die onto a second bottom die without any additional alignment action.
Public/Granted literature
- US20100144068A1 High Throughput Die-to-Wafer Bonding Using Pre-Alignment Public/Granted day:2010-06-10
Information query
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