Invention Grant
US07910937B2 Method and structure for fabricating III-V nitride layers on silicon substrates
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在硅衬底上制造III-V族氮化物层的方法和结构
- Patent Title: Method and structure for fabricating III-V nitride layers on silicon substrates
- Patent Title (中): 在硅衬底上制造III-V族氮化物层的方法和结构
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Application No.: US11344472Application Date: 2006-02-01
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Publication No.: US07910937B2Publication Date: 2011-03-22
- Inventor: Peng Chen , Soo Jin Chua , Zhonglin Miao , Sudhiranjan Tripathy
- Applicant: Peng Chen , Soo Jin Chua , Zhonglin Miao , Sudhiranjan Tripathy
- Applicant Address: SG Singapore
- Assignee: Agency for Science, Technology and Research
- Current Assignee: Agency for Science, Technology and Research
- Current Assignee Address: SG Singapore
- Agency: Birch, Stewart, Kolasch & Birch, LLP
- Main IPC: H01L33/00
- IPC: H01L33/00

Abstract:
A method and structure for fabricating III-V nitride layers on silicon substrates includes a substrate, a transition structure having AlGaN, AlN and GaN layers, and a superlattice structure having AlGaN and GaN layers. In the invention, the large lattice mismatch (17%) between GaN and silicon is solved by using AlN as the first buffer layer with a 5:4 coincidence between AlN(0001) and Si(111) lattice to reduce the lattice mismatch to 1.3%.
Public/Granted literature
- US20060191474A1 Method and structure for fabricating III-V nitride layers on silicon substrates Public/Granted day:2006-08-31
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