Invention Grant
- Patent Title: Semiconductor memory device
- Patent Title (中): 半导体存储器件
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Application No.: US10593275Application Date: 2005-06-03
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Publication No.: US07910975B2Publication Date: 2011-03-22
- Inventor: Fukashi Morishita , Kazutami Arimoto
- Applicant: Fukashi Morishita , Kazutami Arimoto
- Applicant Address: JP Kanagawa
- Assignee: Renesas Electronics Corporation
- Current Assignee: Renesas Electronics Corporation
- Current Assignee Address: JP Kanagawa
- Agency: McDermott Will & Emery LLP
- Priority: JP2004-170920 20040609
- International Application: PCT/JP2005/010242 WO 20050603
- International Announcement: WO2005/122244 WO 20051222
- Main IPC: H01L29/788
- IPC: H01L29/788 ; H01L27/01 ; H01L27/12

Abstract:
The present invention aims at providing a semiconductor memory device that can be manufactured by a MOS process and can realize a stable operation. A storage transistor has impurity diffusion regions, a channel formation region, a charge accumulation node, a gate oxide film, and a gate electrode. The gate electrode is connected to a gate line and the impurity diffusion region is connected to a source line. The storage transistor creates a state where holes are accumulated in the charge accumulation node and a state where the holes are not accumulated in the charge accumulation node to thereby store data “1” and data “0”, respectively. An access transistor has impurity diffusion regions, a channel formation region, a gate oxide film, and a gate electrode. The impurity diffusion region is connected to a bit line.
Public/Granted literature
- US20080251860A1 Semiconductor Memory Device Public/Granted day:2008-10-16
Information query
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