发明授权
US07913123B2 Concurrently sharing a memory controller among a tracing process and non-tracing processes using a programmable variable number of shared memory write buffers
失效
在跟踪过程和使用可编程可变数量的共享内存写入缓冲区的非跟踪过程之间同时共享内存控制器
- 专利标题： Concurrently sharing a memory controller among a tracing process and non-tracing processes using a programmable variable number of shared memory write buffers
- 专利标题（中）： 在跟踪过程和使用可编程可变数量的共享内存写入缓冲区的非跟踪过程之间同时共享内存控制器
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申请号： US12210005申请日： 2008-09-12
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公开(公告)号： US07913123B2公开(公告)日： 2011-03-22
- 发明人: Ra'ed Mohammad Al-Omari , Alexander Erik Mericas , William John Starke
- 申请人： Ra'ed Mohammad Al-Omari , Alexander Erik Mericas , William John Starke
- 申请人地址： US NY Armonk
- 专利权人： International Business Machines Corporation
- 当前专利权人： International Business Machines Corporation
- 当前专利权人地址： US NY Armonk
- 代理机构： Yee & Associates, P.C.
- 代理商 Matthew W. Baca
- 主分类号： G06F11/00
- IPC分类号： G06F11/00
摘要：
An apparatus and computer program product are disclosed for, in a processor, concurrently sharing a memory controller among a tracing process and non-tracing processes using a programmable variable number of shared memory write buffers. A hardware trace facility captures hardware trace data in a processor. The hardware trace facility is included within the processor. The hardware trace data is transmitted to a system memory utilizing a system bus. The system memory is included within the system. The system bus is capable of being utilized by processing units included in the processing node while the hardware trace data is being transmitted to the system bus. Part of system memory is utilized to store the trace data. The system memory is capable of being accessed by processing units in the processing node other than the hardware trace facility while part of the system memory is being utilized to store the trace data.
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