发明授权
- 专利标题： Semiconductor device
- 专利标题（中）： 半导体器件
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申请号： US12697683申请日： 2010-02-01
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公开(公告)号： US07919990B2公开(公告)日： 2011-04-05
- 发明人: Fujio Masuoka , Hiroki Nakamura
- 申请人： Fujio Masuoka , Hiroki Nakamura
- 申请人地址： JP Tokyo
- 专利权人： Unisantis Electronics (Japan) Ltd.
- 当前专利权人： Unisantis Electronics (Japan) Ltd.
- 当前专利权人地址： JP Tokyo
- 代理机构： Brinks Hofer Gilson & Lione
- 优先权： JP2007-201687 20070802
- 主分类号： H03K19/20
- IPC分类号： H03K19/20 ; H03K19/094 ; H01L23/52
摘要：
A semiconductor device of the present invention comprises an SGT based, at least two-stage CMOS inverter cascade circuit configured to allow a pMOS SGT to have a gate width two times greater than that of an nMOS SGT. A first CMOS inverter includes two pMOS SGT arranged at respective ones of an intersection of the 1st row and the 1st column and an intersection of the 2nd row and the 1st column, and an nMOS SGT arranged at an intersection of the 1st row and the 2nd column. A second CMOS inverter includes two pMOS SGT arranged at respective ones of an intersection of the 1st row and the 3rd column and an intersection of the 2nd row and the 3rd column, and an nMOS SGT arranged at an intersection of the 2nd row and the 2nd column.
公开/授权文献
- US20100194438A1 SEMICONDUCTOR DEVICE 公开/授权日：2010-08-05
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