发明授权
- 专利标题： Sealing structure with barrier membrane for electronic element, display device, electronic apparatus, and fabrication method for electronic element
- 专利标题（中）： 用于电子元件的屏障膜的密封结构，显示装置，电子设备和电子元件的制造方法
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申请号： US12382399申请日： 2009-03-16
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公开(公告)号： US07928656B2公开(公告)日： 2011-04-19
- 发明人: Yoichi Imamura
- 申请人： Yoichi Imamura
- 申请人地址： JP Tokyo
- 专利权人： Seiko Epson Corporation
- 当前专利权人： Seiko Epson Corporation
- 当前专利权人地址： JP Tokyo
- 代理机构： Oliff & Berridge, PLC
- 优先权： JP2002-006572 20020115
- 主分类号： H05B33/04
- IPC分类号： H05B33/04 ; H05B33/00
摘要：
A sealing structure having a barrier membrane, with which the overall thickness of a display device can be reduced while ensuring sufficient barrier properties against water and oxygen so as to prevent deterioration of luminous layers. The sealing structure comprises a multi-layered resin membrane 14b for sealing an electronic element section 3 disposed on a substrate 2, which is formed by alternately depositing flattening resin layers 14c and barriers layers 14d on the substrate 2. The flattening resin layers 14c are formed inside a blocking region 14a surrounding the electronic element section 3. A display device having the sealing structure, an electronic apparatus having the display device, and a fabrication method for the display device are also disclosed.