A phase-locked loop circuit comprises a phase error detector for receiving a multi-phase reference signal and a synchronized phase signal of the phase-locked-loop circuit, and for performing a rotational transformation to convert the multi-phase reference signal into two-phase quantities at a synchronous rotation d-q reference frame. A monotonic transfer module receives the two-phase quantities, and generates a monotonic phase error signal which is monotonic when a phase difference between the multi-phase reference signal and the synchronized phase signal ranges from −180 degrees to 180 degrees. A regulator receives the monotonic phase error signal, and generates a synchronized rotation frequency. An integrator receives the synchronized rotation frequency, and generates the synchronized phase signal.