A successive approximation A/D converter includes a capacitive D/A converter including capacitors, and generates a voltage based on the input voltage and a first digital signal including J bits; a resistive D/A converter that generates a voltage based on a second digital signal; a capacitor that capacity-couples the voltage to an output node; a comparator that generates a result based on the voltage; a control circuit that supplies the first digital signal to the capacitive D/A converter according to the result and outputs a third digital signal indicating a correction and a fourth digital signal including K bits; and a digital calculating circuit that generates the second digital signal including K bits based on the third digital signal and the fourth digital signal, and supplies the second digital signal to the resistive D/A converter, a (J+K) bit digital data is generated based on the input signal.