发明授权
US07933161B2 Memory device configured to refresh memory cells in a power-down state
有权
配置为在掉电状态下刷新存储单元的内存设备
- 专利标题： Memory device configured to refresh memory cells in a power-down state
- 专利标题（中）： 配置为在掉电状态下刷新存储单元的内存设备
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申请号： US11509057申请日： 2006-08-24
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公开(公告)号： US07933161B2公开(公告)日： 2011-04-26
- 发明人: Hideaki Miyamoto , Shigeharu Matsushita
- 申请人： Hideaki Miyamoto , Shigeharu Matsushita
- 申请人地址： US DE Wilmington
- 专利权人： Patrenella Capital Ltd., LLC
- 当前专利权人： Patrenella Capital Ltd., LLC
- 当前专利权人地址： US DE Wilmington
- 代理机构： Schwabe, Williamson & Wyatt, P.C.
- 优先权： JP2005-241943 20050824
- 主分类号： G11C7/20
- IPC分类号： G11C7/20
摘要：
A memory capable of preventing a memory cell from disappearance of data resulting from accumulated disturbances is obtained. This memory comprises a nonvolatile memory cell and a refresh portion for rewriting data in the memory cell. The refresh portion reads data from and rewrites data in the memory cell in a power-down state.
公开/授权文献
- US20070047363A1 Memory 公开/授权日：2007-03-01