发明授权
US07936638B2 Enhanced programmable pulsewidth modulating circuit for array clock generation
失效
用于阵列时钟产生的增强可编程脉宽调制电路
- 专利标题: Enhanced programmable pulsewidth modulating circuit for array clock generation
- 专利标题(中): 用于阵列时钟产生的增强可编程脉宽调制电路
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申请号: US12472510申请日: 2009-05-27
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公开(公告)号: US07936638B2公开(公告)日: 2011-05-03
- 发明人: Yuen H. Chan , Michael J. H. Lee , Rolf Sautter , Tobias Werner
- 申请人: Yuen H. Chan , Michael J. H. Lee , Rolf Sautter , Tobias Werner
- 申请人地址: US NY Armonk
- 专利权人: International Business Machines Corporation
- 当前专利权人: International Business Machines Corporation
- 当前专利权人地址: US NY Armonk
- 代理商 Matthew W. Baca; Jack V. Musgrove
- 主分类号: G11C8/00
- IPC分类号: G11C8/00
摘要:
A pulsewidth modulation circuit uses a plurality of programmable paths to connect its output line to ground connections. The paths have different numbers of serially-connected NFETs to provide different pulldown rates. A desired programmable paths is selected based on encoded control signals, with decode logic integrated into the programmable paths. The decode logic includes, for each path, at least two transistors controlled by one of the encoded signals or their complements. A default path to ground may also be provided for use when none of the programmable paths is selected. For example, two encoded signals may be used to select 1-in-4 among the default path and three programmable paths. Integration of the decode logic into the programmable paths results in smaller overall circuit area, leading to reduced power usage, while still retaining the orthogonal benefit of encoded control signals.
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