Provided is a power-on reset circuit suitable for a semiconductor device that operates at a low supply voltage. When a supply voltage (VDD) becomes higher than a first output circuit reversal threshold voltage (Vz) after a reset signal is output, a first control circuit (51) operates so that the reset signal is not output. With an appropriate circuit design in which the first output circuit reversal threshold voltage (Vz) is low, the output and stop of the reset signal is enabled at the low supply voltage (VDD).