Invention Grant
US07956475B2 Step cavity for enhanced drop test performance in ball grid array package
有权
用于球栅阵列封装中增强跌落测试性能的阶梯腔
- Patent Title: Step cavity for enhanced drop test performance in ball grid array package
- Patent Title (中): 用于球栅阵列封装中增强跌落测试性能的阶梯腔
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Application No.: US12336273Application Date: 2008-12-16
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Publication No.: US07956475B2Publication Date: 2011-06-07
- Inventor: Kim-Yong Goh , Jing-En Luan
- Applicant: Kim-Yong Goh , Jing-En Luan
- Applicant Address: SG Singapore
- Assignee: STMicroelectronics Asia Pacific Pte. Ltd.
- Current Assignee: STMicroelectronics Asia Pacific Pte. Ltd.
- Current Assignee Address: SG Singapore
- Agent Lisa K. Jorgenson; Andre M. Szuwalski
- Main IPC: H01L23/28
- IPC: H01L23/28

Abstract:
A ball grid array (BGA) package includes a substrate layer having first and second sides. A semiconductor chip is attached to the first side of the substrate layer by a dielectric adhesive layer. A plurality of solder balls are attached to the second side of the substrate layer. The solder balls may be set out by rows and columns. A plurality of wires electrically connect the semiconductor chip to the solder balls. A layer of encapsulating compound is deposited over the semiconductor chip. A step cavity of a selected depth and shape is formed in the layer of encapsulating compound at or near the edge or periphery of the layer of encapsulating compound. The step cavity is separated from the solder balls by the substrate layer but spans over a plurality of selected solder balls.
Public/Granted literature
- US20100148363A1 STEP CAVITY FOR ENHANCED DROP TEST PERFORMANCE IN BALL GRID ARRAY PACKAGE Public/Granted day:2010-06-17
Information query
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