Method of forming a transistor gate of a recessed access device, method of forming a recessed transistor gate and a non-recessed transistor gate, and method of fabricating an integrated circuit

Invention Grant

US07977236B2 Method of forming a transistor gate of a recessed access device, method of forming a recessed transistor gate and a non-recessed transistor gate, and method of fabricating an integrated circuit 有权

Title translation: 形成凹陷式存取器件的晶体管栅极的方法，形成凹陷晶体管栅极和非凹槽晶体管栅极的方法以及制造集成电路的方法

Please log in to see more content

Patent Title: Method of forming a transistor gate of a recessed access device, method of forming a recessed transistor gate and a non-recessed transistor gate, and method of fabricating an integrated circuit
Patent Title (中): 形成凹陷式存取器件的晶体管栅极的方法，形成凹陷晶体管栅极和非凹槽晶体管栅极的方法以及制造集成电路的方法
Application No.: US12476364

Application Date: 2009-06-02
Publication No.: US07977236B2

Publication Date: 2011-07-12
Inventor: Hasan Nejad , Thomas A. Figura , Gordon A. Haller , Ravi Iyer , John Mark Meldrim , Justin Harnish
Applicant: Hasan Nejad , Thomas A. Figura , Gordon A. Haller , Ravi Iyer , John Mark Meldrim , Justin Harnish
Applicant Address: US ID Boise
Assignee: Micron Technology, Inc.
Current Assignee: Micron Technology, Inc.
Current Assignee Address: US ID Boise
Agency: Wells St. John PS
Main IPC: H01L21/4763
IPC: H01L21/4763

Method of forming a transistor gate of a recessed access device, method of forming a recessed transistor gate and a non-recessed transistor gate, and method of fabricating an integrated circuit

Abstract:

Methods and structures are provided for full silicidation of recessed silicon. Silicon is provided within a trench. A mixture of metals is provided over the silicon in which one of the metals diffuses more readily in silicon than silicon does in the metal, and another of the metals diffuses less readily in silicon than silicon does in the metal. An exemplary mixture includes 80% nickel and 20% cobalt. The silicon within the trench is allowed to fully silicide without void formation, despite a relatively high aspect ratio for the trench. Among other devices, recessed access devices (RADs) can be formed by the method for memory arrays.

Abstract(Chinese):

为嵌入硅完全硅化提供了方法和结构。在沟槽内提供硅。在硅上提供了一种金属混合物，其中一种金属在硅中比硅中更容易扩散到金属中，而另一种金属在硅中比在金属中的硅更容易扩散。示例性的混合物包括80％的镍和20％的钴。尽管沟槽的纵横比相对较高，但沟槽内的硅可以完全无硅化物形成。在其他设备中，可以通过用于存储器阵列的方法形成凹陷接入设备（RAD）。

Public/Granted literature

US20090239366A1 Method Of Forming A Transistor Gate Of A Recessed Access Device, Method Of Forming A Recessed Transistor Gate And A Non-Recessed Transistor Gate, And Method Of Fabricating An Integrated Circuit Public/Granted day:2009-09-24

Information query

Espacenet

IPC分类:

H	电学
H01	基本电气元件
H01L	半导体器件；其他类目中不包括的电固体器件（使用半导体器件的测量入G01；一般电阻器入H01C；磁体、电感器、变压器入H01F；一般电容器入H01G；电解型器件入H01G9/00；电池组、蓄电池入H01M；波导管、谐振器或波导型线路入H01P；线路连接器、汇流器入H01R；受激发射器件入H01S；机电谐振器入H03H；扬声器、送话器、留声机拾音器或类似的声机电传感器入H04R；一般电光源入H05B；印刷电路、混合电路、电设备的外壳或结构零部件、电气元件的组件的制造入H05K；在具有特殊应用的电路中使用的半导体器件见应用相关的小类）
H01L21/00	专门适用于制造或处理半导体或固体器件或其部件的方法或设备
H01L21/02	.半导体器件或其部件的制造或处理
H01L21/04	..至少具有一个跃变势垒或表面势垒的器件，例如PN结、耗尽层、载体集结层
H01L21/34	...具有H01L21/06，H01L21/16及H01L21/18各组不包含的或有或无杂质，例如掺杂材料的半导体的器件
H01L21/46	....用H01L21/36至H01L21/428各组不包含的方法或设备处理半导体材料的（在半导体材料上制作电极的入H01L21/44）
H01L21/461	.....改变半导体材料的表面物理特性或形状的，例如腐蚀、抛光、切割
H01L21/4763	......非绝缘层的沉积，例如绝缘层上的导电层、电阻层；这些层的后处理（电极的制造入H01L21/28）