发明授权
- 专利标题： Simulation method and simulation apparatus for LDMOSFET
- 专利标题（中）： LDMOSFET的仿真方法和仿真装置
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申请号： US12130320申请日： 2008-05-30
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公开(公告)号： US07983889B2公开(公告)日： 2011-07-19
- 发明人: Mitiko Miura , Masahiro Yokomichi , Takahiro Kajiwara , Norio Sadachika , Masataka Miyake , Takahiro Iizuka , Masahiko Taguchi , Tatsuya Ohguro
- 申请人： Mitiko Miura , Masahiro Yokomichi , Takahiro Kajiwara , Norio Sadachika , Masataka Miyake , Takahiro Iizuka , Masahiko Taguchi , Tatsuya Ohguro
- 申请人地址： JP Yokohama-shi
- 专利权人： Semiconductor Technology Academic Research Center
- 当前专利权人： Semiconductor Technology Academic Research Center
- 当前专利权人地址： JP Yokohama-shi
- 代理机构： Oblon, Spivak, McClelland, Maier & Neustadt, L.L.P.
- 优先权： JP2007-237184 20070912
- 主分类号： G06F17/50
- IPC分类号： G06F17/50
摘要：
The drift region for increasing the breakdown voltage in an LDMOSFET is regarded as a resistive element. The potential distribution of the overall device is calculated by obtaining a potential distribution considering the resistance by iterative calculation. A capacitance generated in the drift region is analytically calculated assuming a linear potential distribution. A capacitance generated in the overlap region between the gate electrode and the drift region is calculated by considering the potential from the depletion region to the accumulation region.
公开/授权文献
- US20090070084A1 SIMULATION METHOD AND SIMULATION APPARATUS FOR LDMOSFET 公开/授权日：2009-03-12
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