发明授权
- 专利标题: Electrostatic discharge withstand voltage evaluating device and electrostatic discharge withstand voltage evaluating method
- 专利标题(中): 静电放电耐压评估装置及静电放电耐压评估方法
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申请号: US12311857申请日: 2007-10-17
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公开(公告)号: US07990170B2公开(公告)日: 2011-08-02
- 发明人: Narakazu Shimomura , Toshio Mimoto , Koichi Kamiyama
- 申请人: Narakazu Shimomura , Toshio Mimoto , Koichi Kamiyama
- 申请人地址: JP Osaka
- 专利权人: Sharp Kabushiki Kaihsa
- 当前专利权人: Sharp Kabushiki Kaihsa
- 当前专利权人地址: JP Osaka
- 代理机构: Harness, Dickey & Pierce, P.L.C.
- 优先权: JP2006-286903 20061020
- 国际申请: PCT/JP2007/070259 WO 20071017
- 国际公布: WO2008/047837 WO 20080424
- 主分类号: G01R31/26
- IPC分类号: G01R31/26
摘要:
In one embodiment of the present invention, an electrostatic discharge withstand voltage evaluating device includes: an application device, including a first connecting section and a second connecting section, for supplying pulse electric charge, the first connecting section being connectable to one or whole terminal (s) of one of input terminals and output terminals of a source driver, and supplying electric charge to the source driver, the second connecting section being connectable to one or whole terminal(s) of the other one of the input terminals and the output terminals, and enabling said one or whole terminal(s) of the other one of the input terminals and the output terminals to be grounded; and a common connecting section being connectable to the plurality of output terminals of the source driver, and causing the plurality of output terminals to be electrically connected to each other, wherein the output terminals of the source driver are connected, via the common connecting section, to one of the first connecting section and the second connecting section. Therefore, the electrostatic discharge withstand voltage evaluating device can more successfully recreate how a failure occurs in a semiconductor device and can evaluate an electrostatic discharge breakdown withstand of the semiconductor device.
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