Invention Grant
US07994559B2 Recessed-gate transistor device having a dielectric layer with multi thicknesses and method of making the same 有权
具有多层厚度的电介质层的嵌入式晶体管器件及其制造方法

Recessed-gate transistor device having a dielectric layer with multi thicknesses and method of making the same
Abstract:
A recessed-gate transistor device includes a gate electrode embedded in a gate trench formed in a semiconductor substrate, wherein the gate trench includes a vertical sidewall and a U-shaped bottom. A source region is provided at one side of the gate trench within the semiconductor substrate. A drain region is provided at the other side thereof. An asymmetric gate dielectric layer is formed between the gate electrode and the semiconductor substrate. The asymmetric gate dielectric layer has a first thickness between the gate electrode and the drain region and a second thickness between the gate electrode and the source region, wherein the first thickness is thicker than the second thickness.
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