发明授权
US08003311B2 Integrated circuit system employing multiple exposure dummy patterning technology
有权
采用多次曝光虚拟图形化技术的集成电路系统
- 专利标题： Integrated circuit system employing multiple exposure dummy patterning technology
- 专利标题（中）： 采用多次曝光虚拟图形化技术的集成电路系统
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申请号： US11972809申请日： 2008-01-11
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公开(公告)号： US08003311B2公开(公告)日： 2011-08-23
- 发明人: Sia Kim Tan , Soo Muay Goh , Qunying Lin , Martin Yeo
- 申请人： Sia Kim Tan , Soo Muay Goh , Qunying Lin , Martin Yeo
- 申请人地址： SG Singapore
- 专利权人： GLOBALFOUNDRIES Singapore Pte. Ltd.
- 当前专利权人： GLOBALFOUNDRIES Singapore Pte. Ltd.
- 当前专利权人地址： SG Singapore
- 代理商 Mikio Ishimaru
- 主分类号： G03F7/20
- IPC分类号： G03F7/20
摘要：
An integrated circuit system that includes: providing a substrate coated with a photoresist material; exposing the photoresist material to an energy source through a first mask to form a first substrate feature and a second substrate feature therein; and exposing the photoresist material to the energy source through a second mask to transform the second substrate feature into another one of the first substrate feature therein.