Invention Grant
US08030743B2 Semiconductor package with an embedded printed circuit board and stacked die
有权
半导体封装带有嵌入式印刷电路板和堆叠裸片
- Patent Title: Semiconductor package with an embedded printed circuit board and stacked die
- Patent Title (中): 半导体封装带有嵌入式印刷电路板和堆叠裸片
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Application No.: US11970087Application Date: 2008-01-07
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Publication No.: US08030743B2Publication Date: 2011-10-04
- Inventor: Yong Liu , Margie T. Rios , Hua Yang , Yumin Liu , Tiburcio A. Maldo
- Applicant: Yong Liu , Margie T. Rios , Hua Yang , Yumin Liu , Tiburcio A. Maldo
- Applicant Address: US CA San Jose
- Assignee: Fairchild Semiconductor Corporation
- Current Assignee: Fairchild Semiconductor Corporation
- Current Assignee Address: US CA San Jose
- Agency: Hiscock & Barclay, LLP
- Main IPC: H01L23/495
- IPC: H01L23/495

Abstract:
A two tier power module has, in one form thereof, a PC board having upper and lower traces with an opening in the insulating material that contains a power device which has upward extending solder bump connections. An upper leadframe is mounted on the solder bumps and the upper tracks of the PC board. Vias in the PC board connect selected upper and lower traces. A control device is mounted atop the leadframe and wire bonded to the leadframe, and the assembly is encapsulated leaving exposed the bottom surfaces of the lower traces of the PC board as external connections. In another form the PC board is replaced by a planar leadframe and the upper leadframe has stepped sections which make connections with the planar leadframe, the bottom surfaces of the planar leadframe forming external connections of the module.
Public/Granted literature
- US20090174046A1 SEMICONDUCTOR PACKAGE WITH AN EMBEDDED PRINTED CIRCUIT BOARD AND STACKED DIE Public/Granted day:2009-07-09
Information query
IPC分类: