发明授权
- 专利标题: Integrated circuit package system including wafer level spacer
- 专利标题(中): 集成电路封装系统,包括晶圆级隔离器
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申请号: US11456845申请日: 2006-07-11
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公开(公告)号: US08039365B2公开(公告)日: 2011-10-18
- 发明人: Sang-Ho Lee , Jong-Woo Ha , Soo-San Park
- 申请人: Sang-Ho Lee , Jong-Woo Ha , Soo-San Park
- 申请人地址: SG Singapore
- 专利权人: Stats Chippac Ltd.
- 当前专利权人: Stats Chippac Ltd.
- 当前专利权人地址: SG Singapore
- 代理商 Mikio Ishimaru
- 主分类号: H01L21/00
- IPC分类号: H01L21/00 ; H01L23/02
摘要:
An integrated circuit package system that includes providing a wafer level spacer including apertures, which define unit spacers that are interconnected, and configuring the unit spacers to substantially align over devices formed within a substrate.
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