Invention Grant
- Patent Title: Voltage compensation circuit, multi-level memory device with the same, and voltage compensation method for reading the multi-level memory device
- Patent Title (中): 电压补偿电路,多级存储器件,以及用于读取多级存储器件的电压补偿方法
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Application No.: US12650544Application Date: 2009-12-31
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Publication No.: US08040723B2Publication Date: 2011-10-18
- Inventor: Shyh-Shyuan Sheu , Pei-Chia Chiang , Wen-Pin Lin , Chih-He Lin
- Applicant: Shyh-Shyuan Sheu , Pei-Chia Chiang , Wen-Pin Lin , Chih-He Lin
- Applicant Address: TW Hsinchu
- Assignee: Industrial Technology Research Institute
- Current Assignee: Industrial Technology Research Institute
- Current Assignee Address: TW Hsinchu
- Agency: Jianq Chyun IP Office
- Priority: TW98139567A 20091120
- Main IPC: G11C7/00
- IPC: G11C7/00

Abstract:
A voltage compensation circuit, a multi-level memory device with the same, and a voltage compensation method for reading the multi-level memory device are provided. When a memory cell is read, a reference voltage applied to the memory device is adjusted according to variation of characteristics of a drift resistance of a reference cell. The increased value of the reference voltage (i.e. a voltage difference) corresponds to a resistance variation caused by a drift condition. The drift compensation mechanism is adaptive to a compensation circuit of a read driver of the memory device, which can compensate variation of the voltage level when data is read from the memory cell. When the resistance drift occurs, a drift amount is calculated and is added to the reference voltage, in order to avoid the error in judgement caused by the resistance drift when the stored data is read out.
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