发明授权
US08048704B2 Method of forming a MEMS topped integrated circuit with a stress relief layer
有权
用应力消除层形成MEMS顶部集成电路的方法
- 专利标题： Method of forming a MEMS topped integrated circuit with a stress relief layer
- 专利标题（中）： 用应力消除层形成MEMS顶部集成电路的方法
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申请号： US12750145申请日： 2010-03-30
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公开(公告)号： US08048704B2公开(公告)日： 2011-11-01
- 发明人: Peter Smeys , Peter Johnson
- 申请人： Peter Smeys , Peter Johnson
- 申请人地址： US CA Santa Clara
- 专利权人： National Semiconductor Corporation
- 当前专利权人： National Semiconductor Corporation
- 当前专利权人地址： US CA Santa Clara
- 代理商 Mark C. Pickering
- 主分类号： H01L33/12
- IPC分类号： H01L33/12 ; H01L29/82 ; H01L21/268
摘要：
The bow in a wafer that results from fabricating a large number of MEMS devices on the top surface of the passivation layer of the wafer so that a MEMS device is formed over each die region is reduced by forming a stress relief layer between the passivation layer and the MEMS devices.
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