Invention Grant
US08076786B2 Semiconductor package and method for packaging a semiconductor package
有权
用于封装半导体封装的半导体封装和方法
- Patent Title: Semiconductor package and method for packaging a semiconductor package
- Patent Title (中): 用于封装半导体封装的半导体封装和方法
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Application No.: US12501693Application Date: 2009-07-13
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Publication No.: US08076786B2Publication Date: 2011-12-13
- Inventor: Chang Ying Hung , Hsiao Chuan Chang , Tsung Yueh Tsai , Yi Shao Lai , Jian Cheng Chen , Wei Chi Yih , Ho Ming Tong
- Applicant: Chang Ying Hung , Hsiao Chuan Chang , Tsung Yueh Tsai , Yi Shao Lai , Jian Cheng Chen , Wei Chi Yih , Ho Ming Tong
- Applicant Address: TW Kaohsiung
- Assignee: Advanced Semiconductor Engineering, Inc.
- Current Assignee: Advanced Semiconductor Engineering, Inc.
- Current Assignee Address: TW Kaohsiung
- Priority: TW97144458A 20081118
- Main IPC: H01L23/488
- IPC: H01L23/488
Abstract:
A wire bonding structure includes a chip and a bonding wire. The chip includes a base material, at least one first metallic pad, a re-distribution layer and at least one second metallic pad. The first metallic pad is disposed on the base material. The re-distribution layer has a first end and a second end, and the first end is electrically connected to the first metallic pad. The second metallic pad is electrically connected to the second end of the re-distribution layer. The bonding wire is bonded to the second metallic pad.
Public/Granted literature
- US20100007011A1 SEMICONDUCTOR PACKAGE AND METHOD FOR PACKAGING A SEMICONDUCTOR PACKAGE Public/Granted day:2010-01-14
Information query
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