发明授权
US08082537B1 Method and apparatus for implementing spatially programmable through die vias in an integrated circuit
有权
用于在集成电路中通过管芯通孔实现空间可编程的方法和装置
- 专利标题： Method and apparatus for implementing spatially programmable through die vias in an integrated circuit
- 专利标题（中）： 用于在集成电路中通过管芯通孔实现空间可编程的方法和装置
-
申请号： US12361115申请日： 2009-01-28
-
公开(公告)号： US08082537B1公开(公告)日： 2011-12-20
- 发明人: Arifur Rahman
- 申请人： Arifur Rahman
- 申请人地址： US CA San Jose
- 专利权人： Xilinx, Inc.
- 当前专利权人： Xilinx, Inc.
- 当前专利权人地址： US CA San Jose
- 代理商 Robert M. Bush; Raymond Moser; Gerald Chan
- 主分类号： G06F17/50
- IPC分类号： G06F17/50 ; H01L29/06 ; H01L29/40
摘要：
Examples of the invention relate to a method, apparatus, and computer readable medium for designing a mother integrated circuit (IC) configured for stacking with at least one daughter IC. A layout of the mother IC includes at least one interface tile having an electrical configuration for communicating with interface logic of the daughter IC. The method includes: obtaining design rules for through die vias (TDVs) to be formed in the mother IC for implementing connections between the at least one interface tile and a physical interface of the daughter IC; defining a layout of the TDVs in the mother IC according to the design rules; and defining at least one mask for programming interconnect on the mother IC to physically connect the TDVs between the at least one interface tile and the physical interface of the daughter IC without changing the electrical configuration of the at least one interface tile.
信息查询
