Invention Grant
US08085592B2 Charge-trap flash memory device with reduced erasure stress and related programming and erasing methods thereof
有权
具有减少擦除应力的电荷陷阱闪存器件及其相关编程及其擦除方法
- Patent Title: Charge-trap flash memory device with reduced erasure stress and related programming and erasing methods thereof
- Patent Title (中): 具有减少擦除应力的电荷陷阱闪存器件及其相关编程及其擦除方法
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Application No.: US12356123Application Date: 2009-01-20
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Publication No.: US08085592B2Publication Date: 2011-12-27
- Inventor: Sung-Won Yun , Seung-Hyun Moon , Jong-Sun Sel , Yoo-Cheol Shin , Ki-Hwan Choi , Jae-Sung Sim
- Applicant: Sung-Won Yun , Seung-Hyun Moon , Jong-Sun Sel , Yoo-Cheol Shin , Ki-Hwan Choi , Jae-Sung Sim
- Applicant Address: KR Gyeonggi-do
- Assignee: Samsung Electronics Co., Ltd.
- Current Assignee: Samsung Electronics Co., Ltd.
- Current Assignee Address: KR Gyeonggi-do
- Agency: Myers Bigel Sibley & Sajovec, P.A.
- Priority: KR2008-0006216 20080121
- Main IPC: G11C11/34
- IPC: G11C11/34
Abstract:
Operation methods of charge-trap flash memory devices having an unused memory cell for data storage and a normal memory cell used for data storage are discussed. The operation method may include selecting the unused memory cell, and programming the unused memory cell to have a predetermined threshold voltage. The charge-trap flash memory device may thus be provided with improved reliability by interrupting erasure stress to unused memory cells.
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