发明授权
- 专利标题: Method and apparatus for modeling source-drain current of thin film transistor
- 专利标题(中): 薄膜晶体管源漏电流建模方法及设备
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申请号: US12201457申请日: 2008-08-29
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公开(公告)号: US08095343B2公开(公告)日: 2012-01-10
- 发明人: Jae Heon Shin , Chi Sun Hwang , Min Ki Ryu , Woo Seok Cheong , Hye Yong Chu
- 申请人: Jae Heon Shin , Chi Sun Hwang , Min Ki Ryu , Woo Seok Cheong , Hye Yong Chu
- 申请人地址: KR Daejeon
- 专利权人: Electronics and Telecommunications Research Institute
- 当前专利权人: Electronics and Telecommunications Research Institute
- 当前专利权人地址: KR Daejeon
- 代理机构: Rabin & Berdo, P.C.
- 优先权: KR10-2007-0132724 20071217
- 主分类号: G06F17/11
- IPC分类号: G06F17/11
摘要:
Provided are a method and apparatus for modeling source-drain current of a TFT. The method includes receiving sample data, the sample data including a sample input value and a sample output value; adjusting modeling variables according to the sample data; calculating a current model value according to the adjusted modeling variables; when a difference between the calculated current model value and the sample output value is smaller than a predetermined threshold value, fitting a current model by applying the adjusted modeling variables to the current model; applying actual input data to the fitted current model; and outputting a result value corresponding to the actual input data, wherein the current model is a model for predicting the source-drain current of the TFT.
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