发明授权
- 专利标题： Packet coalescing in virtual channels of a data processing system in a multi-tiered full-graph interconnect architecture
- 专利标题（中）： 分组聚合在多层全图互连架构中的数据处理系统的虚拟通道中
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申请号： US11845227申请日： 2007-08-27
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公开(公告)号： US08108545B2公开(公告)日： 2012-01-31
- 发明人: Lakshminarayana B. Arimilli , Ravi K. Arimilli , Ramakrishnan Rajamony
- 申请人： Lakshminarayana B. Arimilli , Ravi K. Arimilli , Ramakrishnan Rajamony
- 申请人地址： US NY Armonk
- 专利权人： International Business Machines Corporation
- 当前专利权人： International Business Machines Corporation
- 当前专利权人地址： US NY Armonk
- 代理商 Frances Lammes; Stephen J. Walder, Jr.; Diana R. Gerhardt
- 主分类号： G06F15/16
- IPC分类号： G06F15/16 ; G06F15/173 ; H04L12/43 ; H04L1/18
摘要：
A mechanism is provided for packet coalescing in virtual channels of a data processing system. A first processor bundles original data into a data packet to be transmitted to a destination processor, the original data comprising payload data and overhead data. The first processor transmits the data packet to a second processor along a path to the destination processor. The second processor determines if the second processor has additional payload data destined for the same destination processor. Responsive to the second processor having the additional payload data, the second processor unbundles the data packet, adds the additional payload data to the payload data, and rebundles the payload data along with the additional payload data and the overhead data into a rebundled data packet. Then the second processor transmits the rebundled data packet to at least one other processor along the path to the destination processor.
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