发明授权
US08117513B2 Test method and test program of semiconductor logic circuit device 失效
半导体逻辑电路器件的测试方法和测试程序

Test method and test program of semiconductor logic circuit device
摘要:
In a combinational portion, when there is one or more unspecified bits in pseudo external input lines and there is no unspecified bit in pseudo external output lines, an assigning operation is carried out. In the combinational portion, when there is one or more unspecified bits in the pseudo external output lines and there is no unspecified bit in the pseudo external input lines, first and second justifying operations are carried out, and a necessary logic value is determined for an unspecified bit of the test cube. In the combinational portion, when there are one more unspecified bits not only in the pseudo external input lines but also the pseudo external output lines, an assigning operation, a justifying operation or first and second assigning/justifying operations are performed upon a focused bit pair.
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