发明授权
US08120389B2 Digital to frequency synthesis using flying-adder with dithered command input
有权
数字频率合成使用飞加法器与抖动命令输入
- 专利标题: Digital to frequency synthesis using flying-adder with dithered command input
- 专利标题(中): 数字频率合成使用飞加法器与抖动命令输入
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申请号: US12536181申请日: 2009-08-05
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公开(公告)号: US08120389B2公开(公告)日: 2012-02-21
- 发明人: Liming Xiu
- 申请人: Liming Xiu
- 申请人地址: US TX Dallas
- 专利权人: Texas Instruments Incorporated
- 当前专利权人: Texas Instruments Incorporated
- 当前专利权人地址: US TX Dallas
- 代理商 Robert D. Marshall, Jr.; W. James Brady; Frederick J. Telecky, Jr.
- 主分类号: H03B21/00
- IPC分类号: H03B21/00 ; H03L7/06
摘要:
To make Flying-Adder architecture even more powerful, a new concept, time-average-frequency, is incorporated into the clock generation circuitry. This is a fundamental breakthrough since it attacks the clock generation problem from its root: how is the clock signal used in real systems? By investigating from this direction, a much more powerful architecture, fixed-VCO-Flying-Adder architecture, is created. Furthermore, based on fixed-VCO-Flying-Adder frequency synthesizer and time-average-frequency, a new type of component called Digital-to-Frequency Converter (DFC) is born.
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