Invention Grant
- Patent Title: Method to enhance channel stress in CMOS processes
- Patent Title (中): 在CMOS工艺中增强沟道应力的方法
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Application No.: US13209501Application Date: 2011-08-15
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Publication No.: US08124486B2Publication Date: 2012-02-28
- Inventor: Zhiqiang Wu , Xin Wang
- Applicant: Zhiqiang Wu , Xin Wang
- Applicant Address: US TX Dallas
- Assignee: Texas Instruments Incorporated
- Current Assignee: Texas Instruments Incorporated
- Current Assignee Address: US TX Dallas
- Agent Jacqueline J. Garner; Wade J. Brady, III; Frederick J. Telecky, Jr.
- Main IPC: H01L21/336
- IPC: H01L21/336

Abstract:
The invention provides a method of fabricating a semiconductor device that enhances the amount of stress that is transmitted to the channel region for carrier mobility enhancement. In one embodiment an amorphous region is formed at or near the gate dielectric interface prior to source/drain anneal. In a second embodiment the gate material is amorphous as deposited and processing temperatures are kept below the gate material crystallization temperature until stress enhancement processing has been completed. The amorphous gate material deforms during high temperature anneal and converts from an amorphous to a polycrystalline phase allowing more stress to be transmitted into the channel region. This enhances carrier mobility and improves transistor drive current.
Public/Granted literature
- US20110300677A1 Novel Method to Enhance Channel Stress in CMOS Processes Public/Granted day:2011-12-08
Information query
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