发明授权
US08129201B2 Stacking apparatus and method for stacking integrated circuit elements 有权
用于堆叠集成电路元件的堆叠装置和方法

  • 专利标题: Stacking apparatus and method for stacking integrated circuit elements
  • 专利标题(中): 用于堆叠集成电路元件的堆叠装置和方法
  • 申请号: US12230095
    申请日: 2008-08-22
  • 公开(公告)号: US08129201B2
    公开(公告)日: 2012-03-06
  • 发明人: Kazuya Okamoto
  • 申请人: Kazuya Okamoto
  • 申请人地址: JP Tokyo
  • 专利权人: Nikon Corporation
  • 当前专利权人: Nikon Corporation
  • 当前专利权人地址: JP Tokyo
  • 代理机构: Morgan, Lewis & Bockius LLP
  • 优先权: JP2004-002081 20040107
  • 主分类号: H01L21/00
  • IPC分类号: H01L21/00
Stacking apparatus and method for stacking integrated circuit elements
摘要:
A stacking apparatus that stacks chip assemblies each having a plurality of chips disposed continuously with circuit patterns and electrodes, includes: a plurality of stages each allowed to move arbitrarily, on which the chip assemblies are placed; a storage unit that stores an estimated extent of change in a position of an electrode at each chip, expected to occur as heat is applied to the chip assemblies placed on the plurality of stages during a stacking process; and a control unit that sets positions of the plurality of stages to be assumed relative to each other during the stacking process based upon the estimated extent of change in the position of the electrode at each chip provided from the storage unit and position information indicating positions of individual chips formed at the chip assemblies and controls at least one of the plurality of stages.
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