发明授权
US08129787B2 Method and apparatus for use in improving linearity of MOSFETs using an accumulated charge sink
有权
用于提高使用累积电荷宿的MOSFET的线性度的方法和装置
- 专利标题: Method and apparatus for use in improving linearity of MOSFETs using an accumulated charge sink
- 专利标题(中): 用于提高使用累积电荷宿的MOSFET的线性度的方法和装置
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申请号: US13053211申请日: 2011-03-22
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公开(公告)号: US08129787B2公开(公告)日: 2012-03-06
- 发明人: Christopher N. Brindle , Michael A. Stuber , Dylan J. Kelly , Clint L. Kemerling , George P. Imthurn , Robert B. Welstand , Mark L. Burgener
- 申请人: Christopher N. Brindle , Michael A. Stuber , Dylan J. Kelly , Clint L. Kemerling , George P. Imthurn , Robert B. Welstand , Mark L. Burgener
- 申请人地址: US CA San Diego
- 专利权人: Peregrine Semiconductor Corporation
- 当前专利权人: Peregrine Semiconductor Corporation
- 当前专利权人地址: US CA San Diego
- 代理机构: Jaquez & Associates
- 代理商 Martin J. Jaquez, Esq.
- 主分类号: H01L27/12
- IPC分类号: H01L27/12
摘要:
A method and apparatus for use in improving the linearity characteristics of MOSFET devices using an accumulated charge sink (ACS) are disclosed. The method and apparatus are adapted to remove, reduce, or otherwise control accumulated charge in SOI MOSFETs, thereby yielding improvements in FET performance characteristics. In one exemplary embodiment, a circuit having at least one SOI MOSFET is configured to operate in an accumulated charge regime. An accumulated charge sink, operatively coupled to the body of the SOI MOSFET, eliminates, removes or otherwise controls accumulated charge when the FET is operated in the accumulated charge regime, thereby reducing the nonlinearity of the parasitic off-state source-to-drain capacitance of the SOI MOSFET. In RF switch circuits implemented with the improved SOI MOSFET devices, harmonic and intermodulation distortion is reduced by removing or otherwise controlling the accumulated charge when the SOI MOSFET operates in an accumulated charge regime.
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