发明授权
- 专利标题： Arranging through silicon vias in IC layout
- 专利标题（中）： 在IC布局中排列硅通孔
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申请号： US12555981申请日： 2009-09-09
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公开(公告)号： US08136084B2公开(公告)日： 2012-03-13
- 发明人: Donald R. Dean, Jr. , Peter J. Lindgren , Glen L. Miles , Edmund J. Sprogis , Anthony K. Stamper
- 申请人： Donald R. Dean, Jr. , Peter J. Lindgren , Glen L. Miles , Edmund J. Sprogis , Anthony K. Stamper
- 申请人地址： US NY Armonk
- 专利权人： International Business Machines Corporation
- 当前专利权人： International Business Machines Corporation
- 当前专利权人地址： US NY Armonk
- 代理机构： Hoffman Warnick LLC
- 代理商 Richard Kotulak
- 主分类号： G06F17/52
- IPC分类号： G06F17/52
摘要：
A portion of an IC layout that includes a plurality of through silicon vias (TSVs) is evaluated to identify linearly aligned TSVs. The portion of the IC layout is modified to reduce a number of the linearly aligned TSVs, resulting in less wafer breakage.
公开/授权文献
- US20110057319A1 ARRANGING THROUGH SILICON VIAS IN IC LAYOUT 公开/授权日：2011-03-10
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