发明授权
US08138053B2 Method of forming source and drain of field-effect-transistor and structure thereof
失效
形成场效应晶体管的源极和漏极的方法及其结构
- 专利标题： Method of forming source and drain of field-effect-transistor and structure thereof
- 专利标题（中）： 形成场效应晶体管的源极和漏极的方法及其结构
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申请号： US11763561申请日： 2007-06-15
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公开(公告)号： US08138053B2公开(公告)日： 2012-03-20
- 发明人: Henry K. Utomo , Shailendra Mishra , Lee Wee Teo , Jae Gon Lee , Shyue Seng Tan
- 申请人： Henry K. Utomo , Shailendra Mishra , Lee Wee Teo , Jae Gon Lee , Shyue Seng Tan
- 申请人地址： US NY Armonk KY Grand Cayman
- 专利权人： International Business Machines Corporation,Global Foundries Inc.
- 当前专利权人： International Business Machines Corporation,Global Foundries Inc.
- 当前专利权人地址： US NY Armonk KY Grand Cayman
- 代理商 Yuanmin Cai
- 主分类号： H01L21/336
- IPC分类号： H01L21/336
摘要：
Embodiments of the invention provide a method of forming a field-effect-transistor (FET). The method includes implanting one or more n-type dopants to create one or more implanted regions with at least a portion of the implanted regions being designated as regions for forming source and drain extensions of the FET; activating the implanted regions; etching with a chlorine based etchant to create openings in the implanted regions, and forming the source and drain extensions by exptaxially growing embedded silicon germanium in the openings. Structure of a semiconductor field-effect-transistor made thereof is also provided.
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