发明授权
- 专利标题: Capacitance trimming circuit of semiconductor device having vertically stacked capacitor layers and operation method thereof
- 专利标题(中): 具有垂直层叠电容器层的半导体器件的电容微调电路及其操作方法
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申请号: US12071847申请日: 2008-02-27
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公开(公告)号: US08143692B2公开(公告)日: 2012-03-27
- 发明人: Myoung-jun Jang , Tae-soo Park
- 申请人: Myoung-jun Jang , Tae-soo Park
- 申请人地址: KR Gyeonggi-do
- 专利权人: Samsung Electronics Co., Ltd.
- 当前专利权人: Samsung Electronics Co., Ltd.
- 当前专利权人地址: KR Gyeonggi-do
- 代理机构: Harness, Dickey & Pierce, P.L.C.
- 优先权: KR10-2007-0019878 20070227
- 主分类号: H01L23/62
- IPC分类号: H01L23/62
摘要:
A capacitance trimming circuit of a semiconductor device may include a plurality of capacitor layers and/or a plurality of fuses. The plurality of capacitor layers may be vertically stacked. The plurality of fuses may be arranged to correspond to the plurality of capacitor layers, and/or the plurality of fuses may be configured to select corresponding ones of the plurality of capacitor layers for controlling a capacitance of the plurality of capacitor layers.
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