Invention Grant
- Patent Title: Process and system for the verification of correct functioning of an on-chip memory
- Patent Title (中): 用于验证片上存储器正确功能的过程和系统
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Application No.: US12101711Application Date: 2008-04-11
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Publication No.: US08161327B2Publication Date: 2012-04-17
- Inventor: Carolina Selva , Cosimo Torelli , Danilo Rimondi , Rita Zappa
- Applicant: Carolina Selva , Cosimo Torelli , Danilo Rimondi , Rita Zappa
- Applicant Address: IT Agrate Brianza (MI)
- Assignee: STMicroelectronics S.R.L.
- Current Assignee: STMicroelectronics S.R.L.
- Current Assignee Address: IT Agrate Brianza (MI)
- Agency: Allen, Dyer, Doppelt, Milbrath & Gilchrist, P.A.
- Priority: ITVA2007A0041 20070411
- Main IPC: G06F11/00
- IPC: G06F11/00

Abstract:
A method is for making an integrated circuit with built-in self-test. The method includes forming at least one nonvolatile read only memory (ROM) to store ROM code and forming a logic self-test circuit to verify a correct functioning of the at least one nonvolatile ROM. Moreover, the method includes defining, in the logic self-test circuit, a logic self-test core to process the ROM code and to generate a flag based upon a control signature and defining, in the logic self-test circuit, a nonvolatile storage block, coupled to the logic self-test core, to store the control signature. Furthermore, the method includes writing the ROM code to the at least one nonvolatile ROM and writing the control signature to the nonvolatile storage block, during a same fabrication step.
Public/Granted literature
- US20080256407A1 PROCESS AND SYSTEM FOR THE VERIFICATION OF CORRECT FUNCTIONING OF AN ON-CHIP MEMORY Public/Granted day:2008-10-16
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