Invention Grant
US08164135B2 Non-diffusion junction split-gate nonvolatile memory cells and arrays, methods of programming, erasing, and reading thereof, and methods of manufacture
有权
非扩散结分离栅极非易失性存储器单元和阵列，其编程，擦除和读取方法以及制造方法
- Patent Title: Non-diffusion junction split-gate nonvolatile memory cells and arrays, methods of programming, erasing, and reading thereof, and methods of manufacture
- Patent Title (中): 非扩散结分离栅极非易失性存储器单元和阵列，其编程，擦除和读取方法以及制造方法
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Application No.: US12773811Application Date: 2010-05-04
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Publication No.: US08164135B2Publication Date: 2012-04-24
- Inventor: Changyuan Chen , Ya-Fen Lin , Dana Lee
- Applicant: Changyuan Chen , Ya-Fen Lin , Dana Lee
- Applicant Address: US CA Sunnyvale
- Assignee: Silicon Storage Technology, Inc.
- Current Assignee: Silicon Storage Technology, Inc.
- Current Assignee Address: US CA Sunnyvale
- Agency: DLA Piper LLP (US)
- Main IPC: H01L29/788
- IPC: H01L29/788
Abstract:
Nonvolatile flash memory systems and methods are disclosed having a semiconductor substrate of a first conductivity type, including non-diffused channel regions through which electron flow is induced by application of voltage to associated gate elements. A plurality of floating gates are spaced apart from one another and each insulated from the channel region. A plurality of control gates are spaced apart from one another and insulated from the channel region, with each control gate being located between a first floating gate and a second floating gate and capacitively coupled thereto to form a subcell. A plurality of spaced-apart assist gates are insulated from the channel region, with each assist gate being located between and insulated from adjacent subcells. The channel is formed of three regions, two beneath adjacent control gate elements as well as a third region between the first two and beneath an associated assist gate.
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Information query
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