Invention Grant
US08164137B2 Multiple-gate MOS transistor using Si substrate and method of manufacturing the same
有权
使用Si衬底的多栅极MOS晶体管及其制造方法
- Patent Title: Multiple-gate MOS transistor using Si substrate and method of manufacturing the same
- Patent Title (中): 使用Si衬底的多栅极MOS晶体管及其制造方法
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Application No.: US12556666Application Date: 2009-09-10
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Publication No.: US08164137B2Publication Date: 2012-04-24
- Inventor: Young Kyun Cho , Tae Moon Roh , Jong Dae Kim
- Applicant: Young Kyun Cho , Tae Moon Roh , Jong Dae Kim
- Applicant Address: KR Daejeon
- Assignee: Electronics and Telecommunication Research Institute
- Current Assignee: Electronics and Telecommunication Research Institute
- Current Assignee Address: KR Daejeon
- Agency: Ladas & Parry LLP
- Priority: KR10-2005-0089718 20050927
- Main IPC: H01L29/66
- IPC: H01L29/66 ; H01L21/02

Abstract:
Provided are a multiple-gate MOS (metal oxide semiconductor) transistor and a method of manufacturing the same. The transistor includes a single crystalline active region having a channel region having an upper portion of a streamlined shape (∩) obtained by patterning an upper portion of a bulk silicon substrate with an embossed pattern, and having a thicker and wider area than the channel region; a nitride layer formed at both side surfaces of the single crystalline active region to expose an upper portion of the single crystalline active region at a predetermined height; and a gate electrode formed to be overlaid with the exposed upper portion of the single crystalline active region of the channel region.
Public/Granted literature
- US20100019321A1 MULTIPLE-GATE MOS TRANSISTOR USING Si SUBSTRATE AND METHOD OF MANUFACTURING THE SAME Public/Granted day:2010-01-28
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