发明授权
US08169022B2 Vertical junction field effect transistors and diodes having graded doped regions and methods of making
有权
具有渐变掺杂区域的垂直结型场效应晶体管和二极管及其制造方法
- 专利标题： Vertical junction field effect transistors and diodes having graded doped regions and methods of making
- 专利标题（中）： 具有渐变掺杂区域的垂直结型场效应晶体管和二极管及其制造方法
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申请号： US12818232申请日： 2010-06-18
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公开(公告)号： US08169022B2公开(公告)日： 2012-05-01
- 发明人: Lin Cheng , Michael Mazzola
- 申请人： Lin Cheng , Michael Mazzola
- 申请人地址： US MS Jackson
- 专利权人： SS SC IP, LLC
- 当前专利权人： SS SC IP, LLC
- 当前专利权人地址： US MS Jackson
- 代理机构： Morris, Manning & Martin, LLP
- 代理商 Christopher W. Raimund
- 主分类号： H01L29/66
- IPC分类号： H01L29/66
摘要：
Semiconductor devices and methods of making the devices are described. The devices can be junction field-effect transistors (JFETs) or diodes such as junction barrier Schottky (JBS) diodes or PiN diodes. The devices have graded p-type semiconductor layers and/or regions formed by epitaxial growth. The methods do not require ion implantation. The devices can be made from a wide-bandgap semiconductor material such as silicon carbide (SiC) and can be used in high temperature and high power applications.
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