发明授权
US08174904B2 Memory array and method of operating one of a plurality of memory cells 有权
存储器阵列和操作多个存储器单元之一的方法

Memory array and method of operating one of a plurality of memory cells
摘要:
An embodiment of the invention provides a memory array including a plurality of bit lines, a plurality of memory cells and a device. Each of the plurality of memory cells has a first node, a second node and a third node, wherein the third node is coupled to one of the plurality of bit lines. The device couples the plurality of bit lines together to form a common node for one of the plurality of memory cells.
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