A pulse width modulation (PWM) signal generator generates multiple output PWM signals from an input PWM signal. The output PWM signals are synchronized to synchronization events. Each output PWM signal has a duty ratio substantially equal to the duty ratio of the input PWM signal, and each output PWM signal has a fixed phase-shift in relation to the other output PWM signals. The PWM signal generator samples an input PWM cycle to determine sample parameters representative of its duty ratio. The sample parameters are then used to generate a corresponding output PWM cycle for each of the output PWM signals. In response to a synchronization event, the PWM signal generator prematurely terminates the current PWM cycle and initiates the next PWM cycle while ensuring that the portion of the current output PWM cycle completed by the leading output PWM signal up to the point of the premature termination is replicated for the corresponding output PWM cycles of the other non-leading output PWM signals.