摘要:
A stabilized flour, such as stabilized whole grain wheat flour, exhibiting unexpectedly superior extended shelf life and superior biscuit baking functionality, may be produced with or without heating to inhibit lipase by subjecting whole grains or a bran and germ fraction or component to treatment with a lipase inhibitor, such as an acid or green tea extract. Treatment with the lipase inhibitor may be performed during tempering of the whole grains or berries or during hydration of the bran and germ fraction or component.
摘要:
Systems and methods for visualization of a call over network (CON) are provided. In some embodiments, the visualization of a call over network may be effectuated by three functionalities: a readiness dialog box that enables the facilitation of the call, the inclusion of visualization and participant features within the call, and a visualized summary after the call. The readiness dialog box is presented to the callers prior to the onset of the call. It presents the other participant's and their status. It also enables the caller to send messages (both preconfigured and customized) to the other participants. Once sufficient participants have joined, the call may start. Once the call starts, it may be visualized by displaying on a single or multi channels, which caller is speaking, and any additional indications they may be providing. The caller may likewise be provided a set of participant features that allow the user to interact with the call. After the call concludes, a visualized summary of the call can then be generated. The summary includes any of the recording, transcriptions, scenario information, speaker information and the duration each speaker was talking, etc.
摘要:
A pulse width modulation (PWM) signal generator generates a PWM signal having a specified effective PWM duty resolution for a corresponding cycle window. The PWM signal generator receives an N-bit value representing a duty to be implemented and sets values X and Y to the M least significant bits and the N-M most significant bits, respectively, of the N-bit value. The value M can be determined based on the value N and a maximum implementable frequency of a clock signal used to time the generation of each PWM cycle. The PWM signal generator generates a cycle window of 2M PWM cycles, each PWM cycle of the cycle window having a duty of either Y or Y+1. The number of PWM cycles in the cycle window having the duty Y+1 is based on the value X and the PWM cycles having a particular duty are contiguous within the cycle window.
摘要:
Systems and methods for a readiness dialog box for a call over network (CON) are provided. In some embodiments, the readiness dialog box is presented to the callers prior to the onset of the call. It presents the other participant's and their status. For example, it may indicate which participants are online, but not yet ready, those who are ready, and those not available. It also enables the caller to send messages (both preconfigured and customized) to the other participants. Once sufficient participants have joined, the call may start. Sufficiency of participants could include a quorum of individuals, may require that specific participants are ready, everyone is ready, or may be time dependent. The participant requirements may be configured by the individual setting up the call based upon call type.
摘要:
Systems and methods for improving quality of a call over network (CON) are provided. Call quality may be improved via buffer length modulation based upon the call scenario type. Scenario detection may be based upon who speaks, and the duration of the speaking, as well as contextual analysis. Further, the call over network quality may further be improved by deploying modules over the network. The modules are intermediary vehicles between each communicator and backend servers. The modules intercept audio packets from the communicator to detect packet loss, and perform recovery of lost packets, thereby accelerating real-time audio conversations.
摘要:
In one general aspect, a power supply circuit can include a power stage configured to be coupled to a power source and configured to deliver an output voltage to a load circuit, and can include a comparator coupled to the power stage and configured to receive a reference voltage. The power supply circuit can also include a hysteresis control circuit configured to receive at least one of a feedback voltage or a reference voltage and configured to change a hysteresis of the comparator in response to the at least one of the feedback voltage or the reference voltage during a soft-start of the power supply circuit.
摘要:
Disclosed are example techniques for frame-based power management in a light emitting diode (LED) system having a plurality of LED strings. A voltage source provides an output voltage to drive the LED strings. An LED driver generates a frame timing reference representative of the frame rate or display timing of a series of image frames to be displayed via the LED system. An update reference is generated from the frame timing reference. The LED driver monitors one or more operating parameters of the LED system. In response to update triggers marked by the update reference, the LED driver adjusts the output voltage of the voltage source based on the status of each of the one or more monitored operating parameters (either from the previous update period or determined in response to the update trigger), thereby synchronizing the updating of the output voltage to the frame rate (or a virtual approximation of the frame rate) of the video being displayed.
摘要:
Techniques for dynamic headroom control in a light emitting diode (LED) system are disclosed. An output voltage is provided to drive a plurality of LED strings. A feedback controller monitors the tail voltages of the LED strings to identify the minimum tail voltage and adjusts the output voltage based on the lowest tail voltage. The LED strings grouped into subsets and the feedback controller is segmented such that, for a certain duration, a minimum tail voltage is determined for each subset. The minimum tail voltages of the subsets are used to determine the overall minimum tail voltage of the plurality of LED strings for the certain duration so as to control the output voltage in the following duration. The segments of the feedback controller can be implemented in separate integrated circuit (IC) packages, thereby facilitating adaptation to different numbers of LED strings by integrating the corresponding number of IC packages.
摘要:
An automatic assembly jig adapted for assembling an electronic component and a case is provided. The jig includes a working platform, a carrier, a pressure exerting device and at least a gear. The working platform has a guiding rail. The carrier is disposed on the working platform and is slidably mounted on the guiding rail. The pressure exerting device is disposed above the working platform. The gear is disposed on the working platform and connected with the carrier, so as to drive the carrier moving along the guiding rail to the position under the pressure exerting device.
摘要:
A peak detection/digitization circuit includes a plurality of level detect units, each having a comparator and a flip-flop with a clock input responsive to the output of the comparator. For a detection period, each level detect unit configures a data output signal of the flip-flop to a first data state responsive to a start of the detection period. Further, each level detect unit is configured to enable the comparator responsive to the data output signal having the first data state or a second data state, respectively. While the comparator is enabled during the detection period, the level detect unit configures the data output signal of the flip-flop responsive to a comparison of an input signal to a corresponding reference voltage level by the comparator. The data output signals of the flip-flops of the level detect units at the end of the detection period are used to determine a digital value representative of a peak voltage level of the input signal.